Some manufacturing methods of a semiconductor device need etching of a complicated-shaped removal region or a deep and large removal region as described, for example in JP-A-2008-264902 (hereafter, referred to as a patent document No. 1), JP-A-2000-31501 (hereafter, referred to as a patent document No. 2), and JP-A-2010-164394 (hereafter, referred to as a patent document No. 3).
The patent document No. 1 relates to a manufacturing method of a silicon structure that forms, for example, an acceleration sensor or an angular velocity sensor. The manufacturing method includes a process of forming a fixed part and a movable part by processing a silicon substrate and needs etching of a complicated-shaped removal region.
In the manufacturing method of the silicon structure disclosed in the patent document No. 1, a silicon-on-insulator (SOI) substrate, in which an upper layer made of single crystalline silicon, a middle layer made of silicon oxide, and a base layer made of single crystalline silicon are stacked, is used and needs the following two etching processes. In the first etching process, the upper layer is removed by anisotropic etching in a region that separates the fixed part and the movable part. In the second etching process, the middle layer is removed from the region where the upper layer is removed by isotropic etching, and the middle layer in the region where the upper layer is removed and the middle layer in the region that separates the fixed part and the movable part are completely removed. Specifically, in the first etching process, single crystalline silicon in the upper layer is etched to the middle layer using a patterned oxide layer that is formed on a surface of the single crystalline silicon in the upper layer as a mask. In the second etching process, the middle layer exposed by the first etching process is wet-etched, for example, with solution such as hydrogen fluoride.
The patent document No. 2 relates to an etching method for forming a thin-wall part (diaphragm), for example, in a semiconductor pressure sensor, and the etching method needs etching of a deep and large removal region.
In the etching method disclosed in the patent document No. 2, an etching process is carried out as follows in order to reduce an etching time and to equalize a thickness of the thin-wall part. An etching of a predetermined region of a silicon wafer having a PN junction is carried out from one surface of the silicon wafer in a state where the silicon wafer is soaked in a KOH solution and the etching is stopped in the vicinity of a PN junction surface by anodization of silicon. When the etching is stopped by anodization and a current gradient in the silicon wafer increases, a liquid that has a lower temperature and a lower concentration than the KOH solution in a processing tub is poured into the processing tub for diluting and cooling an etching solution. By reducing the temperature and the concentration of the etching solution before the whole etching-processed surface in a wafer surface reaches a PN junction portion, a thickness of the diaphragm (thin-wall part) is uniformed.
In the manufacturing method of the silicon structure disclosed in the patent document No. 1, single crystalline silicon of the upper layer is etched in a depth direction to form the movable part and the fixed part, and then silicon oxide of the middle layer is etched in a horizontal direction, that is, a direction along a substrate plane. However, because an etching rate of silicon oxide of the middle layer is low and an etching rate of single crystalline silicon of the upper layer is also low, there are limits to improve the etching rates.
The etching method disclosed in the patent document No. 2 needs to remove the whole of a deep and large removal region by etching, and there is a limit to decrease an etching time. In addition, the removal region that is deep and large is made of single crystalline silicon, and an etching rate is low as described above. Thus, there is a limit to improve the etching rate.
As described above, in etching of a complicated-shaped removal region and a deep and large removal region, improvement of the etching rate is an important issue.
In associated with the manufacture of the silicon structure in the patent document No. 1, a manufacturing method of a semiconductor device with laser irradiation has been invented to improve an etching rate. The manufacturing method includes a reforming process in which an inside of a single crystalline silicon substrate is partially polycrystallized such that a part is exposed from a surface by irradiating the single crystalline silicon substrate with a laser beam while moving a focal point, and an etching process in which the portion polycrystallized in the reforming process is etched with etchant.
The portion polycrystallized by the laser irradiation in the above-described method, a permeation rate and an adsorption ratio of the etchant are increased compared with the other portion of the single crystalline silicon substrate which is not polycrystallized. Thus, in the above-described manufacturing method, the etching rate can be improved when the semiconductor device is manufactured using the single crystalline silicon substrate by preliminary polycrystallizing a portion of the single crystalline silicon substrate in the reforming process and etching the polycrystallized portion with the etchant in the etching process. The above-described invention has already been filed by some of the inventors of the present invention and another associate and is published as JP-A-2011-040942 and US 2011/0034031 A1.
The etching process with a laser irradiation can be applied not only to a manufacture of a complicated-shaped semiconductor device, such as an acceleration sensor described in the patent document No. 1, but also to a semiconductor device in which a thin-wall part (diaphragm) is formed, such as a semiconductor pressure sensor in the patent document No. 2. However, a relationship between a laser irradiation and reformed portion formed thereby has not been clear. Thus, it has not been clear what kind of laser irradiation can form a required reformed layer and can provide a good etching. In addition, the manufacturing method of the latter semiconductor device that needs etching of a deep and large removal region needs further improvement of the etching rate compared with the manufacturing method of the former semiconductor device.
In the method disclosed in the patent document No. 3, a SOI substrate in which a sacrifice layer is formed on a support substrate and a semiconductor layer is formed on the sacrifice layer is prepared. The SOI substrate is irradiated with a laser beam while focusing on the sacrifice layer in a sacrifice section. The sacrifice section includes a movable part and a fixed part defined by opening portions penetrating the semiconductor layer and the opening portions. Accordingly, the sacrifice layer in the sacrifice section is polycrystallized. Then, etchant is introduced from the opening portions, the polycrystallized sacrifice layer is removed by etching, and thereby the movable part floats from the support substrate.
In the method disclosed in the patent document No. 3, because the sacrifice layer is directly polycrystallized by focusing the laser beam on the sacrifice layer, the etchant easily permeates the polycrystallized sacrifice layer and an etching rate increases. However, even when a part of the sacrifice layer is polycrystallized, it takes times for the etchant to reach the most distance portion of the sacrifice layer from the opening portion, and the productivity is limited. Thus, further improvement of the etching rate of the sacrifice layer is desirable.